ST10: Architecture, Peripherals and Embedded Programming

XC2000/XE16x/XC16x/ST10:
Architecture, Peripherals and Embedded Programming

Training Objectives

You know the architecture, basic on-chip periphery and specifics of the XC2000 / XE16x / XC16x and ST10 device families. You are able to program low-level drivers for this hardware with Keil C166 µVision or Tasking Viper toolset and test them with a debugger. Moreover, you can generate interrupt routines for the CPU and know the functionality of exceptions/traps.

Required Knowledge

Knowledge of ANSI-C as well as experience with programming and the set-up of a microprocessor/microcontroller system. Knowledge of DSP is an advantage.

Target Group

Hardware and software architects, hardware and software developers, test engineers

Infineon XC2000/XE16x/XC16x Architecture: Overview

XC2000/XE16x/XC16x and ST10: C166S V2 Core
- CPU, pipeline, register set, context switch, CPU special function register
- Instruction fetch unit and program flow control
- Memory architecture and address map
- Internal memory block (on-chip: program and data SRAMs, embedded flash)
- System and user stack
- Overview: Instruction set, special instructions and DSP support

Differences in Architecture: XE16x/XC22xx and XC16x

Ports (Pin Definition and Port Functions)

Hardware-near C with Keil /Tasking Tools
- C statements and their execution in Assembler
- Architecture-specific data types, global data handling

Programming Techniques
- Description of peripherals
- Layer model for embedded software systems

Driver Programming
- Structured driver model
- Low-level driver LLD

Interrupt, PEC and Trap Handling
- Interrupt controller, vector table, prioritization
- Peripheral event controller PEC
- TRAPs (exception handling)

Serial Interfaces
- XC16x: asynchronous serial interface ASCx, synchronous serial interface SSCx
- XC2000/XE16x: universal serial interface channel modules USICx with the
features ASC, SCI, LIN, SSC, SPI, IIC, etc.

General Purpose Timer Unit, Watchdog Timer WDT, Real Time Clock RTC

Overview: MultiCAN, Analog Digital Converter ADCx

Overview: Capture Compare Units (CC2, CCU6x)

System Control Unit, Reset, Clock, Power Management
- Start-up process; resets
- Power management
- Clock control PLL
- External request unit ERU

Device Initialization with Digital Application virtual Engineer DAvE®

On-Chip Debug System (OCDS/JTAG) and Environment Tools: Overview

Exercises: For practical training, participants can choose Keil C166/µVision 4
or the Tasking Viper toolset.

The following exercises will be carried out in addition to the training content:
- Set-up of a new project: from device selection to debugger set-up
- Interrupt handling: interrupt vector table entry and interrupt service routine
- DMA transfer (using the PEC controller) in the context of serial communication
- Typed data transfer: typed memory reservation - hardware-near C programming
- Use of power saving mechanisms like CPU IDLE mode
- Use of complex and time-critical peripherals: ADC with PEC/interrupt handling